MS5135N/MS5136N is a dual/single-channel, 12-bit, 125MSPS analog-to-digital converter with an on-chip sample-and-hold circuit.
MS5135N/MS5136N supports a maximum sampling rate of 125MSPS with excellent dynamic performance.
MS5135N/MS5136N operates on a single 1.8V power supply and is compatible with LVPECL/CMOS/LVDS sampling clock signals. In most applications, no external reference source or driver components are required. To achieve the appropriate LVDS serial data rate, MS5135N/MS5136N automatically multiplies the sampling rate clock.
MS5135N/MS5136N provides a data clock output (DCO) for capturing data at the output and a frame clock output (FCO) to signal the transmission of new output bytes. The DCO operates at a maximum frequency of 500MHz.
MS5135N/MS5136N is packaged in a QFN32 package and operates over a temperature range of -40°C to +85°C.
- ⚫ 1.8V power supply
- ⚫ Low power consumption: MS5135N dual-channel 232mW;MS5136N single-channel 172mW(125MSPS, adjustable power options)
- ⚫ SNR = 64dBFS, SFDR = 71dBc,DNL = ±0.4LSB,INL = -6LSB ~ +4LSB
- ⚫ Serial LVDS (ANSI-644, default),reduced swing option (similar to IEEE 1596.3)
- ⚫ 2VPP input voltage range
- ⚫ Serial port control